FPGA/HDLBits
Truthtable1
장영현
2023. 6. 12. 15:13
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Problem Statement
Create a combinational circuit that implements the above truth table.
module top_module(
input x3,
input x2,
input x1, // three inputs
output f // one output
);
assign f = (!x1 & x2 & !x3)||(x1 & x2 & !x3)||(x1 & !x2 & x3)||(x1 & x2 & x3);
endmodule