FPGA/HDLBits
Fadd
장영현
2023. 6. 12. 18:28
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Problem Statement
Create a full adder. A full adder adds three bits (including carry-in) and produces a sum and carry-out.
module top_module(
input a, b, cin,
output cout, sum );
assign sum = a ^ b ^ cin;
assign cout = (a&b) + (b&cin) + (cin&a);
endmodule