FPGA/HDLBits
Sim/circuit2
장영현
2023. 6. 20. 19:33
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This is a combinational circuit. Read the simulation waveforms to determine what the circuit does, then implement it.
| 포트 | 15s - 20s | 20s - 25s | 25s - 30s | 30s - 35s | 35s - 40s | 40s - 45s | 45s - 50s | 50s - 55s |
| a | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| b | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |
| c | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| d | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 |
| q | 0 | 0 | 1 | 0 | 1 | 1 | 0 |
입력 2개 high시 출력 1 -> nxor
module top_module (
input a,
input b,
input c,
input d,
output q );//
assign q = ~(a ^ b ^ c ^ d); // Fix me
endmodule
