FPGA/HDLBits

Sim/circuit8

장영현 2023. 6. 28. 14:19
728x90

This is a sequential circuit. Read the simulation waveforms to determine what the circuit does, then implement it.

module top_module (
    input clock,
    input a,
    output p,
    output q );
	
    always @(*) begin
        if(clock)
            p = a;
    end
    
    always @(negedge clock) begin
    	q <= a;
    end
endmodule