Vector1

Problem Statement

Build a combinational circuit that splits an input half-word (16 bits, [15:0] ) into lower [7:0] and upper [15:8] bytes.

//성공 코드
`default_nettype none     // Disable implicit nets. Reduces some types of bugs.
module top_module( 
    input wire [15:0] in,
    output wire [7:0] out_hi,
    output wire [7:0] out_lo );

    assign out_hi = in[15:8] ;
    assign out_lo = in [7:0];
endmodule

//실패 코드
`default_nettype none     // Disable implicit nets. Reduces some types of bugs.
module top_module( 
    input wire [15:0] in,
    output wire [7:0] out_hi,
    output wire [7:0] out_lo );

    assign out_hi = [15:8] in;
    assign out_lo = [7:0] in;
endmodule
//벡터를 다른 wire에 값 할당 시, [:]변수는 할당 불가 / 변수[:]로 선언 시 할당 가능