Sim/circuit9

This is a sequential circuit. Read the simulation waveforms to determine what the circuit does, then implement it.

module top_module (
    input clk,
    input a,
    output [3:0] q );

    always @(posedge clk) begin
        if(a)
           q <= 3'o4; 
		else begin
           q <= q + 1;
            if(q == 3'o6)
                q <= 3'o0;
        end
    end
endmodule