Mux2to1v

Problem Statement

Create a 100-bit wide, 2-to-1 multiplexer. When sel=0, choose a. When sel=1, choose b.

module top_module( 
    input [99:0] a, b,
    input sel,
    output [99:0] out );
	
    reg [99:0] out_data;
    always @(*) begin
        case (sel)
            1'b0 : out_data = a;
            1'b1 : out_data = b;
        endcase
    end
    assign out = out_data;
endmodule